1. Field of the Invention
The present invention relates to data processing systems and, more particularly, to means for a selectively addressing individual ones of a plurality of component units by a central processor unit.
2. Description of the Prior Art
In the art relating to various forms of data handling and utilization systems, it is not unusual to have analog data from a number of sources, i.e., parametric sensors and the like, to be conditioned and converted to digital form, then have the digital data acted upon by a central processor unit which may, for example, be a microcomputer. In such systems, there is a need for means whereby the central processor unit can communicate with the several signal conditioners associated, respectively, with each of the several source means. To that end, a communication bus is usually provided. Also provided is means for addressing the several signal conditioners or other components, selectively. In the art, each component is identified with its own address code either by way of unique circuit parameters within the component, by way of its position relative to the other components, or by way of time sequence. Each of these addressing schemes has its drawbacks such as complexity and/or expense.